Concurrent Acceleration extends Concurrent Analytics and transforms sequential software into high-performance parallel hardware that executes at 1 to 100 Giga-operations/second. The final result is an FPGA netlist that is functionally identical to the user-provided software executable and that operates at 200MHz or faster.
Input: Compiled x86 Software
- Sequential, Single-core Software
- Standard compilers
- Linux 64-bit executable
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Sequential to Parallel
- Extracts sequential flow
- Extracts parallelism
- Transforms loops into hardware pipelines
- Creates data stream
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Output: Parallel FPGA HW
- Est. of FPGA Speed & Area
- Generates FPGA netlist
- > 200 MHz in an FPGA design
- Outputs FPGA program file
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