PreciseTimeBasic Core
Overview
PreciseTimeBasic is a IEEE1588-2008 V2 compliant clock synchronization IP core for Xilinx FPGAs. It is capable of accurately time stamp IEEE 1588 telegrams and also to provide a compatible timer. All these processes are carried out by hardware modules.
The final accuracy obtained in a IEEE 1588 systems depends on many factors (frequency and quality of the local clock, location of the time stamp in the data chain, etc.). As a reference, next figure shows the measured error between the PPS generated by a Commercial Grandmaster equipment and the PPS generated by a Zedboard Avnet Devopment Platfrom which runs LinuxPTP software stack in the ARM processor and uses the PreciseTimeBasic for hardware assisted timestamping (+/- 50 ns).
Key Features
PreciseTimeBasic Core Features
- 10/100/1000 Mbps/AXI-Stream (For 10 Gbps) Interfaces supported
- 32 bit seconds / 32 bit nanoseconds counter
- 32 bit subnanosecond frequency adjust
- One Pulse Per Second Output available
- Frequency Selectable Output available (1 KHz/2 KHz/4 KHz/8 KHz/16 KHz/32 KHz)
- Minimum FPGA resources utilization
- Alarm generation
- Event Timestamping
Software Features
- Ordinary Clock and Boundary Clock operation
- End-to-End and Peer-to-Peer delay mechanisms support
- Support for PTP on both Layer 2 (Ethernet) and Layer 3 (IPv4) interfaces
- It can be combined with HSR-PRP and ManagedEthernet IP Cores
- VLAN support
- Profiles: Default, Power, Power-Utility, IEEE 802.1AS
Supported FPGAs
- 7-Series (Zynq, Spartan, Artix, Kintex, Virtex)
- Ultrascale (Kintex, Virtex)
- Ultrascale+ (Zynq MPSoC, Kintex, Virtex)
Embedded Development Suite
A hardware development platform is available. Latest documentation, design support files, reference design source files and tools are available for download free of charge.
* Device supported by the free Xilinx Vivado WebPACK tool.
Pricing, Availability and Ordering
- Concurrent EDA is the US Distributor for SoC-e.
- Currently Available to US customers only.
- Please email Ray at
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